| 摘要 |
An embodiment of the present invention relates to an ultra low power wideband asynchronous binary phase shift keying (BPSK) demodulation method and a circuit configuration thereof. Provided is an ultra low power wideband asynchronous BPSK demodulation circuit configured by comprising: a sideband division and upper sideband signal delay unit dividing a modulated signal into an upper sideband and a lower sideband by a first order high-pass filter and a first order low-pass filter of which a cutoff frequency is a carrier frequency, so as to output an analog signal delayed by a ¼ period of the carrier frequency from an upper sideband analog signal, and a lower sideband analog signal; a data demodulation unit latching, through a hysteresis circuit, a signal generated by a difference between the analog signals in which a phase difference between the delayed upper sideband analog signal and the lower sideband analog signal is aligned at 0o, that is, an analog pulse signal indicated according to a phase shift part of a BPSK modulation signal, so as to demodulate digital data; and a data clock recovery unit for generating a data clock by using a signal digitalized from the lower sideband analog signal through a comparator and a data signal. |
