Systems and methods for locking branch target buffer entries

摘要

A data processing system includes a processor configured to execute processor instructions and a branch target buffer having a plurality of entries. Each entry is configured to store a branch target address and a lock indicator, wherein the lock indicator indicates whether the entry is a candidate for replacement, and wherein the processor is configured to access the branch target buffer during execution of the processor instructions. The data processing system further includes control circuitry configured to determine a fullness level of the branch target buffer, wherein in response to the fullness level reaching a fullness threshold, the control circuitry is configured to assert the lock indicator of one or more of the plurality of entries to indicate that the one or more of the plurality of entries is not a candidate for replacement.

主权项

1. A data processing system, comprising:
a processor configured to execute processor instructions; a branch target buffer having a plurality of entries, each entry configured to store a branch target address and a lock indicator, wherein the lock indicator indicates whether the entry is a candidate for replacement, and wherein the processor is configured to access the branch target buffer during execution of the processor instructions; and control circuitry configured to determine a fullness level of the branch target buffer, wherein in response to the fullness level reaching a fullness threshold, the control circuitry is configured to assert the lock indicator of one or more of the plurality of entries to indicate that the one or more of the plurality of entries is not a candidate for replacement, wherein the control circuitry is configured to determine a fullness level of a set of the branch target buffer, in response to the fullness level reaching the fullness threshold, asserting the lock indicator for one or more entries in the set, and the branch target buffer is configured to, in response to a miss of a processor access of the branch target buffer, select an entry for replacement from entries of the branch target buffer whose lock indicator is not asserted.