发明名称 Semiconductor devices and semiconductor systems including the same
摘要 Semiconductor systems are provided. The semiconductor system may include a controller and a semiconductor device. The controller may generate command signals and address signals. The semiconductor device may discharge electric charges of a first local line pair and a second local line pair during a predetermined period after a read operation begins according to a combination of the command signals, equalize and pre-charge levels of the first and second local line pairs when a pre-charge operation is executed or the address signals are inputted thereto. The semiconductor device may also sense and amplify data loaded on the first or second local line pair to output the amplified data through an input/output line after the read operation begins.
申请公布号 US9305621(B2) 申请公布日期 2016.04.05
申请号 US201414488428 申请日期 2014.09.17
申请人 SK Hynix Inc. 发明人 Kim Min Su
分类号 G11C11/4091;G11C7/22;G11C7/06;G11C7/10;G11C7/12;G11C8/10;G11C8/18;G11C8/12 主分类号 G11C11/4091
代理机构 William Park & Associates Ltd. 代理人 William Park & Associates Ltd.
主权项 1. A semiconductor device comprising: a command decoder suitable for decoding command signals and for generating a read signal for execution of a read operation; an address decoder suitable for decoding address signals and for generating internal address signals; a control signal generator suitable for generating a control signal during a predetermined period in response to the read signal; an input/output controller suitable for generating an input control signal in response to the read signal and suitable for generating a first group of column selection signals and a second group of column selection signals, one column selection signal among the first and second groups of column selection signals being selectively enabled according to a combination of the internal address signals; and a data input/output unit suitable for equalizing and pre-charging first and second local line pairs if a pre-charge operation is executed or the address signals are inputted to the address decoder and suitable for sensing and amplifying data loaded on the first or second local line pair to output the amplified data through an input/output line, wherein the data input/output unit is suitable for discharging electric charges of the first and second local line pairs in response to the control signal.
地址 Gyeonggi-do KR