发明名称 Wafer Level optoelectronic device packages and methods for making the same
摘要 Described herein are methods for fabricating a plurality of optoelectronic devices, and the optoelectronic devices resulting from such methods. One such method includes performing through silicon via (TSV) processing on a wafer, which includes a plurality of light detector sensor regions, to thereby form a plurality of vias, and then tenting and plating the vias and performing wafer back metallization. Thereafter, plurality of light source dies are attached to a top surface of the wafer, and a light transmissive material is then molded to encapsulate the light detector sensor regions and the light sensor dies therein. Additionally, opaque barriers including opaque optical crosstalk barriers are fabricated. Further, solder balls or other electrical connectors are attached to the bottom of the wafer. The wafer is eventually diced to separate the wafer into a plurality of optoelectronic devices.
申请公布号 US9305967(B1) 申请公布日期 2016.04.05
申请号 US201514749169 申请日期 2015.06.24
申请人 INTERSIL AMERICAS LLC 发明人 A Tharumalingam Sri Ganesh
分类号 H01L27/146;H01L21/768;H01L25/16;H01L31/16;H01L31/18 主分类号 H01L27/146
代理机构 Vierra Magen Marcus LLP 代理人 Vierra Magen Marcus LLP
主权项 1. A method for fabricating a plurality of optoelectronic devices, comprising: (a) performing through silicon via (TSV) processing on a wafer, which includes a plurality of light detector sensor regions, to thereby form a plurality of vias; (b) tenting and plating the vias and performing wafer back metallization, after performing the TSV processing; (c) attaching each of a plurality of light source dies to a top surface of the wafer; and (d) molding a light transmissive material to encapsulate the light detector sensor regions and the light sensor dies in the light transmissive material, after the (b) tenting and plating the vias and performing wafer back metallization, and after the (c) attaching the plurality of light source dies to the top surface of the wafer; (e) fabricating opaque barriers including opaque optical crosstalk barriers; (f) attaching solder balls or other electrical connectors to the bottom of the wafer; and (g) dicing the wafer to separate the wafer into a plurality of optoelectronic devices.
地址 Milpitas CA US