| 摘要 |
PROBLEM TO BE SOLVED: To provide clock signal distribution power efficiency improvement.SOLUTION: A circuit may include a pulse generation circuit to be configured to receive a first clock signal with a first-clock rate and a first-clock duty cycle. The pulse generation circuit may be configured to generate, based on the first clock signal, a pulse signal with a pulse frequency and with a pulse duty cycle that is smaller than the first-clock duty cycle. The circuit may also include a sub-harmonic injection locking oscillator to be configured to receive the pulse signal. The sub-harmonic injection locking oscillator may be configured to generate, based on the pulse signal, a second clock signal with a second-clock rate that is greater than the first-clock rate and greater than the pulse frequency.SELECTED DRAWING: Figure 1 |
