| 摘要 |
The present invention enhances read operation reliability without being influenced by the resistance variation of a bit line and unselected memory cells. A semiconductor storage device is provided with a read circuit 101 for reading out data stored in a plurality of memory chains for storing information. To determine readout data, the read circuit 101 compares a reference current flowing through the memory chains as a result of a first readout mode and a cell read current flowing through the memory chains as a result of a second readout mode. In the first readout mode, a precharge voltage is supplied to the memory chains with all of the phase-change elements of the memory chains unselected. In the second readout mode, the precharge voltage is supplied to the memory chains with the phase-change elements of the memory chains selected. |
