发明名称 |
Multi-rate transceiver circuitry |
摘要 |
Techniques to operate circuitry in an integrated circuit are provided. The circuitry may include a receiver circuit and one of the provided techniques includes receiving a data stream at the receiver circuit. The receiver circuit may include a detector circuit that is used to determine the data rate of the received data stream. A controller block in the receiver circuit may accordingly configure a deserializer circuit in the receiver circuit based on the data rate of the received data stream. The circuitry may further include a transmitter circuit for transmitting data streams. The transmitter circuit may be configured during runtime based on the data rate of a data stream that is being transmitted. In some instances, irrespective of the data rate of the data stream being transmitted, a constant reference clock may be used in the transmitter circuit. |
申请公布号 |
US9300463(B2) |
申请公布日期 |
2016.03.29 |
申请号 |
US201414271348 |
申请日期 |
2014.05.06 |
申请人 |
Altera Corporation |
发明人 |
Oh Boon Hong;Yap Chee Wai |
分类号 |
H04L27/00;H04L7/033;H04L7/00 |
主分类号 |
H04L27/00 |
代理机构 |
|
代理人 |
|
主权项 |
1. A method of operating a transmitter circuit in an integrated circuit, the method comprising:
determining a data rate of a data stream being transmitted out of the transmitter circuit; setting a control signal based on the data rate of the data stream; and configuring a scrambler circuit in the transmitter circuit based on the control signal. |
地址 |
San Jose CA US |