发明名称 Methods of manufacturing a semiconductor device
摘要 A method of manufacturing a vertical type memory device includes stacking a first lower insulating layer, one layer of a lower sacrificial layer and a second lower insulating layer on a substrate, forming a stacking structure by stacking sacrificial layers and insulating layers, and etching an edge portion of the stacking structure to form a preliminary stepped shape pattern structure. The preliminary stepped shape pattern structure has a stepped shape edge portion. A pillar structure making contact with a surface of the substrate is formed. The preliminary stepped shape pattern structure, the lower sacrificial layer, and the first and second lower insulating layers are partially etched to form a first opening portion and a second opening portion to form a stepped shape pattern structure. The second opening portion cuts at least an edge portion of the lower sacrificial layer.
申请公布号 US9299716(B2) 申请公布日期 2016.03.29
申请号 US201514790724 申请日期 2015.07.02
申请人 Samsung Electronics Co., Ltd. 发明人 Hwang Sung-Min;Kim Han-Soo;Lee Woon-Kyung;Cho Won-Seok
分类号 H01L29/792;H01L27/115;H01L29/66 主分类号 H01L29/792
代理机构 Harness, Dickey & Pierce, P.L.C. 代理人 Harness, Dickey & Pierce, P.L.C.
主权项 1. A vertical memory device, comprising: a pillar structure on a substrate, the pillar structure including a channel pattern extending in a vertical direction from a top surface of the substrate; a plurality of conductive layer patterns surrounding outer sidewalls of the pillar structure, the conductive layer patterns stacked in the vertical direction to be spaced apart from each other, each of the conductive layer patterns extending in a first direction substantially parallel to the top surface of the substrate; and a lower sacrificial layer pattern on the substrate, the lower sacrificial layer pattern and a sidewall in the first direction of a lowermost conductive layer pattern of the conductive layer patterns being spaced apart from each other and facing each other.
地址 Gyeonggi-do KR