发明名称 DISPLAY AND DISPLAY CONTROL CIRCUIT
摘要 A display control circuit of a display performs generation of overdrive processed data and detection of a proper direction of overdriving from current frame uncompressed compressed data obtained by performing compression processing and uncompression processing on compressed data corresponding to image data of a current frame, and previous frame uncompressed compressed data obtained by performing the compression processing and the uncompression processing on image data of a previous frame, and generates post-correction overdrive processed data by correcting the overdrive processed data according to the detected proper direction. The display control circuit transmits post-correction compressed data obtained by compressing the post-correction overdrive processed data to a driver as transfer compressed data.
申请公布号 US2016078849(A1) 申请公布日期 2016.03.17
申请号 US201514941205 申请日期 2015.11.13
申请人 RENESAS ELECTRONICS CORPORATION 发明人 FURIHATA Hirobumi;NOSE Takashi;HORI Yoshihiko
分类号 G09G5/36;G09G3/36;G09G3/34 主分类号 G09G5/36
代理机构 代理人
主权项 1. An image processor configured to compress image data and output compressed image data, the image processor comprising: a first compression circuit configured to generate compressed current data based on image data of a current frame, a second compression circuit configured to generate compressed previous data based on image data of a previous frame, a first decompression circuit configured to generate decompressed current data based on the compressed current data; a second decompression circuit configured to generate decompressed previous data based on the compressed previous data; an overdrive processing part configured to generate overdriven data based on the decompressed current data and the decompressed previous data; a correction circuit configured to generate corrected overdriven data by correcting the overdriven data; a third compression circuit configured to generate compressed corrected overdriven data based on the corrected overdriven data; and a third decompression circuit configured to generate redecompressed corrected data based on the compressed corrected data; a transmission circuit configured to transmit the compressed corrected data according to a comparison result of the current decompressed data and redecompressed corrected data.
地址 Tokyo JP