发明名称 Random access addressing on active pixel image sensor
摘要 An active pixel image sensor comprises a pixel array of active pixels that are capable of being random access addressed to provide pixel readout signals from the addressed pixels on N output lines, where N is a plural integer and M ADC lanes capable of performing analog-to-digital conversion of pixel readout signals, where M is a plural integer less than N. A switching arrangement is capable of selectively connecting output lines to the M ADC lanes. A control unit provides random access addressing of the pixels, and in synchronisation therewith controls the switching arrangement to connect the output lines on which the addressed pixels provide pixel readout signals to ADC lanes.
申请公布号 US9288402(B2) 申请公布日期 2016.03.15
申请号 US201214349771 申请日期 2012.10.04
申请人 ISIS Innovation Limited 发明人 Moldovan Grigore;Lin Chao;Kirkland Angus Ian
分类号 H04N3/14;H04N5/335;H04N5/235;H04N5/355;H04N5/378;H04N5/341;H04N5/3745;H04N5/376;H04N5/232;H04N1/32 主分类号 H04N3/14
代理机构 Honigman Miller Schwartz and Cohn LLP 代理人 Honigman Miller Schwartz and Cohn LLP
主权项 1. An active pixel image sensor comprising: a pixel array of active pixels that are capable of being random access addressed to provide pixel readout signals from the addressed pixels on N output lines, where N is a plural integer; M ADC lanes arranged in parallel and each capable of performing analog-to-digital conversion of pixel readout signals, where M is a plural integer less than N; a switching arrangement capable of selectively connecting output lines to the M ADC lanes; a control unit arranged to provide random access addressing of the pixels, and in synchronisation therewith to control the switching arrangement in accordance with the random access addressing of the pixels to connect the output lines on which the addressed pixels provide pixel readout signals to selected ADC lanes,wherein each ADC lane is arranged to supply a status signal to the control unit that indicates whether it is ready for operation, and the control unit is arranged to control the switching arrangement in response thereto so as to connect the output lines on which the addressed pixels provide pixel readout signals to ADC lanes that are indicated by their status signals to be ready for operation.
地址 Oxford GB