Transistor strain-inducing scheme

摘要

A transistor device includes a gate structure disposed over a channel region of a semiconductor substrate. A source/drain recess is arranged in the semiconductor substrate alongside the gate structure. A doped silicon-germanium (SiGe) region is disposed within the source/drain recess and has a doping type which is opposite to that of the channel. An un-doped SiGe region is also disposed within the source/drain recess. The un-doped SiGe region underlies the doped SiGe region and comprises different germanium concentrations at different locations within the source/drain recess.

主权项

1. A transistor device, comprising:
a gate structure disposed on a semiconductor substrate; a substantially v-shaped source/drain recess arranged in the semiconductor substrate alongside the gate structure, the source/drain recess having a bottom tip spaced beneath an upper surface of the semiconductor substrate and having outermost edges spaced beneath the upper surface of the semiconductor substrate on opposite sides of the bottom tip; a doped strain-inducing region disposed within the source/drain recess, wherein the doped strain-inducing region comprises a compound semiconductor material that is doped with n-type or p-type dopant impurities; and an un-doped strain-inducing region disposed within the source/drain recess under the doped strain-inducing region, wherein the un-doped strain-inducing region comprises the compound semiconductor material at a first stoichiometry near the bottom tip of the source/drain recess, and comprises the compound semiconductor material at a second, different stoichiometry near an outermost edge of the source/drain recess.