发明名称 Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design
摘要 A microelectronic package can include a substrate comprising a dielectric element having first and second opposite surfaces, and a microelectronic element having a face extending parallel to the first surface. The substrate can also include a plurality of peripheral edges extending between the first and second surfaces defining a generally rectangular or square periphery of the substrate. The substrate can further include a plurality of contacts and terminals, the contacts being at the first surface, the terminals being at at least one of the first or second surfaces. The microelectronic elements can have a plurality of edges bounding the face, and a plurality of element contacts at the face electrically coupled with the terminals through the contacts of the substrate. Each edge of the microelectronic element can be oriented at an oblique angle with respect to the peripheral edges of the substrate.
申请公布号 US9281296(B2) 申请公布日期 2016.03.08
申请号 US201414448040 申请日期 2014.07.31
申请人 Invensas Corporation 发明人 Sun Zhuowen;Chen Yong;Bang Kyong-Mo
分类号 H01L25/00;H01L25/065;H01L23/498;H01L23/00 主分类号 H01L25/00
代理机构 Lerner, David, Littenberg, Krumholz & Mentlik, LLP 代理人 Lerner, David, Littenberg, Krumholz & Mentlik, LLP
主权项 1. A microelectronic package, comprising: a substrate comprising a dielectric element having first and second opposite surfaces, a plurality of peripheral edges extending between the first and second surfaces defining a generally rectangular or square periphery of the substrate, and comprising a plurality of contacts and terminals, the contacts being at the first surface, the terminals being at at least one of the first or second surfaces, the terminals including first terminals and second terminals; and first and second microelectronic elements in a stack on a same side of the first surface, each microelectronic element having a face extending parallel to the first surface, a plurality of edges bounding the face, and a plurality of element contacts at the face electrically coupled with the terminals through the contacts of the substrate, the element contacts of each microelectronic element including first and second contacts electrically coupled to the respective first and second terminals, all of the first contacts within a first connection region adjacent to a first edge of the edges of the respective microelectronic element, and all of the second contacts within a second connection region adjacent to a second edge of the edges of the respective microelectronic element opposite the first edge, wherein each edge of each microelectronic element is oriented at an oblique angle with respect to the peripheral edges of the substrate, and each of the first and second edges of the second microelectronic element are oriented at an angle between 60 degrees and 120 degrees relative to the first and second edges of the first microelectronic element, respectively, wherein the first contacts and the first terminals are configured to carry data information including data signals, and the second contacts and the second terminals are configured to carry address information, and wherein a difference in total electrical length between a shortest lead and a longest lead extending between the first terminals and the first contacts is less than 2% of an inverse of a frequency at which the microelectronic element is configured to operate.
地址 San Jose CA US