| 摘要 |
A non-volatile memory (NVM) system (100) has a normal mode, a standby mode and an off mode that uses less power than the standby mode. The NVM system includes NVM peripheral circuitry (102, 106, 110), a controller (108), and an NVM array (104) that includes NVM cells (302, 304, 306, 308, 310, and 312) and. Each NVM cell includes a control gate. The controller is coupled to the NVM array, applies a voltage to the control gates and power to the peripheral circuitry during the standby mode, and applies an off-mode voltage to the control gates and removes power from the NVM peripheral circuitry during the off mode. |
