发明名称 Techniques for forming non-planar germanium quantum well devices
摘要 Techniques are disclosed for forming a non-planar germanium quantum well structure. In particular, the quantum well structure can be implemented with group IV or III-V semiconductor materials and includes a germanium fin structure. In one example case, a non-planar quantum well device is provided, which includes a quantum well structure having a substrate (e.g. SiGe or GaAs buffer on silicon), a IV or III-V material barrier layer (e.g., SiGe or GaAs or AlGaAs), a doping layer (e.g., delta/modulation doped), and an undoped germanium quantum well layer. An undoped germanium fin structure is formed in the quantum well structure, and a top barrier layer deposited over the fin structure. A gate metal can be deposited across the fin structure. Drain/source regions can be formed at respective ends of the fin structure.
申请公布号 US9263557(B2) 申请公布日期 2016.02.16
申请号 US201314069880 申请日期 2013.11.01
申请人 Intel Corporation 发明人 Pillarisetty Ravi;Kavalieros Jack T.;Rachmady Willy;Shah Uday;Chu-Kung Benjamin;Radosavljevic Marko;Mukherjee Niloy;Dewey Gilbert;Jin Been-Yih;Chau Robert S.
分类号 H01L29/66;B82Y10/00;H01L29/267;H01L29/775;H01L29/778;H01L21/76;H01L29/78;H01L29/10;H01L29/51 主分类号 H01L29/66
代理机构 Finch & Maloney PLLC 代理人 Finch & Maloney PLLC
主权项 1. A method of forming a non-planar semiconductor device, the method comprising: selectively etching a quantum well structure to form an active body structure, the quantum well structure having a substrate, a IV or III-V material barrier layer, a doping layer, and a germanium quantum well layer; depositing a top barrier layer of semiconductor material over at least a portion of the active body structure, wherein the top barrier layer covers top and sidewall portions of the active body structure; and forming a gate structure across at least a portion of the top barrier layer, including depositing a gate dielectric.
地址 Santa Clara CA US