发明名称 Transistor and its method of manufacture
摘要 A transistor includes a substrate, a source terminal and a drain terminal, each terminal being supported by the substrate, and the source and drain terminal being separated by a portion of the substrate, a layer of semiconductive material deposited so as to cover the portion of the substrate and to connect the source terminal to the drain terminal, a layer of dielectric material deposited so as to cover at least a portion of the layer of semiconductive material, and a layer of electrically conductive material deposited so as to cover at least a portion of the layer of dielectric material. The layer of electrically conductive material providing a gate terminal to which a potential may be applied to control a conductivity of the layer of semiconductive material connecting the source and drain terminals.
申请公布号 US9263553(B2) 申请公布日期 2016.02.16
申请号 US201113638061 申请日期 2011.03.29
申请人 Pragmatic Printing Limited 发明人 Price Richard David
分类号 H01L21/336;H01L29/66;H01L51/05;H01L27/12;G03F7/00 主分类号 H01L21/336
代理机构 Myers Bigel Sibley & Sajovec, PA 代理人 Myers Bigel Sibley & Sajovec, PA
主权项 1. A method of manufacturing a transistor, the method comprising: providing a substrate and a region of electrically conductive material supported by the substrate; forming at least one layer of resist material over said region to form a covering of resist material over said region; forming a depression in a surface of the covering of resist material, said depression extending over a first portion of said region, said first portion separating a second portion of the region from a third portion of the region; removing resist material located under said depression so as to form a window, through said covering, exposing said first portion of the electrically conductive region; removing said first portion to expose a portion of substrate separating the second portion from the third portion of the region; depositing semiconductive material at least inside the window to form a layer of semiconductive material connecting the second portion to the third portion; depositing dielectric material to form a layer of dielectric material over said layer of semiconductive material; depositing electrically conductive material to form a layer of electrically conductive material over said layer of dielectric material; removing resist material at least from around said window so as to expose the second and third portions, wherein said second and third portions provide a source terminal and a drain terminal respectively and the layer of electrically conductive material provides a gate terminal to which a potential may be applied to control a conductivity of the layer of semiconductive material connecting the second and third portions; undercutting the covering of resist material around the window before said depositing of semiconductive material so as to expose a part of an upper surface of the second portion adjacent the separating portion of substrate and expose a part of an upper surface of the third portion adjacent the separating portion of substrate; and forming a step in said exposed part of the second portion and a step in said exposed part of the third portion before depositing said semiconductive material.
地址 Co Durham GB