SUB-RESOLUTION ASSIST FEATURE IMPLEMENTATION WITH SHOT OPTIMIZATION

摘要

A design layout for a semiconductor chip includes information on shapes desired to be fabricated. Clusters of photolithographic exposure “shots” are generated and subject to a measure of shot density to approximate a mask shape that generates the desired fabricated shapes when exposed during wafer fabrication. A simulation is run on the clusters of shots to estimate the resulting fabrication shapes that the clusters of shots create. The clusters of shots are modified to align the estimated fabrication shapes more closely with desired fabrication shapes. The process of simulating and modifying the shots is iterative, repeating until the estimated fabrication shapes are within a desired error difference of the planned fabrication shape.

主权项

1. A computer-implemented method for shape analysis comprising:
determining a desired fabricated shape based on a semiconductor design layout corresponding to a physical chip, wherein the desired fabricated shape corresponds to the semiconductor design layout; evaluating the semiconductor design layout to determine mask shapes, wherein the mask shapes are determined comprising analyzing the semiconductor design layout to evaluate desired fabricated shapes; establishing a shot density for shots used to generate the mask shapes; approximating, using one or more processors, the mask shapes using shots based on the shot density; estimating a resulting fabricated semiconductor layout based on the shots; modifying the shots to make the resulting fabricated semiconductor layout to be closer to the desired fabricated shape; and storing information on the shots onto computer storage media.