发明名称 Semiconductor apparatus having power through holes connected to power pattern
摘要 A semiconductor apparatus includes a multilayer interposer substrate including a power layer as an inner layer; a plurality of connection terminals provided on one surface of the interposer substrate; and a semiconductor chip mounted on the other surface of the interposer substrate. Among power terminals, ground terminals, and signal terminals provided in the semiconductor apparatus, all the power terminals are arranged in one power area and the power area includes only the power terminals.
申请公布号 US9252098(B2) 申请公布日期 2016.02.02
申请号 US201013504462 申请日期 2010.11.02
申请人 CANON KABUSHIKI KAISHA 发明人 Hoshi Sou
分类号 H01L23/528;H01L23/535;H01L23/50;H01L23/48;H01L23/522;H01L23/498 主分类号 H01L23/528
代理机构 Canon USA, Inc. IP Division 代理人 Canon USA, Inc. IP Division
主权项 1. A semiconductor apparatus comprising: a multilayer interposer substrate having a connection terminal surface on one side and a chip mounting surface on another side, the interposer substrate including a power layer as an inner layer; a plurality of connection terminals provided on the connection terminal surface; and a semiconductor chip mounted on the chip mounting surface, wherein the plurality of connection terminals include power terminals, ground terminals, and signal terminals, wherein the power terminals are connected to a power pattern on the power layer and the semiconductor chip via power through holes, wherein the ground terminals are connected to the semiconductor chip via ground through holes, wherein the signal terminals are connected to the semiconductor chip via signal through holes, wherein the power, ground, and signal through holes go through the interposer substrate from the connection terminal surface to the chip mounting surface, wherein the ground and signal through holes are not formed in the power pattern on the power layer, and wherein the power pattern defines an area that surrounds only the power through holes.
地址 Tokyo JP