发明名称 INCREMENTAL ERROR DETECTION AND CORRECTION FOR MEMORIES
摘要 A device and method for incrementally updating the error detecting and correcting bits for an error corrected block of data in a cross point memory array is disclosed. When an error corrected block of data is modified, only the modified data bits and the incrementally updated error detecting and correcting bits are changed in the cross point memory device for improved performant and reduced impact to device endurance.
申请公布号 US2016019112(A1) 申请公布日期 2016.01.21
申请号 US201514803091 申请日期 2015.07.19
申请人 HGST, Inc. 发明人 Shepard Daniel R.
分类号 G06F11/10;H03M13/35;G11C29/52 主分类号 G06F11/10
代理机构 代理人
主权项 1. A method of storing information in an electronic memory device having one or more pluralities of bits whereby a plurality of bits consists of data bits and error detecting and/or error correcting bits, comprising the steps of: (i) changing fewer than the total number of data bits; (ii) determining a change to the error detecting and/or error correcting bits corresponding to the change in data bits; (iii) writing data bits to the memory device; and (iv) writing error correcting bits to the memory device.
地址 San Jose CA US