发明名称 Software pipelining at runtime
摘要 Apparatuses and methods may provide for determining a level of performance for processing one or more loops by a dynamic compiler and executing code optimizations to generate a pipelined schedule for the one or more loops that achieves the determined level of performance within a prescribed time period. In one example, a dependence graph may be established for the one or more loops, and each dependence graph may be partitioned into stages based on the level of performance.
申请公布号 US9239712(B2) 申请公布日期 2016.01.19
申请号 US201313853430 申请日期 2013.03.29
申请人 Intel Corporation 发明人 Rong Hongbo;Park Hyunchul;Wu Youfeng
分类号 G06F9/45 主分类号 G06F9/45
代理机构 Jordan IP Law, LLC 代理人 Jordan IP Law, LLC
主权项 1. An apparatus to perform pipelining comprising: a first circuit to determine a level of performance for processing one or more loops by a dynamic compiler; a second circuit to execute code optimizations to generate a pipelined schedule for the one or more loops that achieves the determined level of performance within a prescribed time period; and a third circuit to establish a dependence graph for the one or more loops and partition each dependence graph into stages based on the level of performance, wherein the level of performance is to be based on a calculated minimum initiation interval (MII) that is calculated via a Howard Iteration Policy (HIP) algorithm from the dependence graph, wherein the HIP algorithm is constrained to have a complexity that is less than exponential.
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