发明名称 電圧生成回路およびパワーオンリセット回路
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a voltage generating circuit capable of quickly outputting a reference voltage, even in a case where a power supply voltage is transiently lowered, after the power supply voltage is subsequently raised, and further to provide a power-on reset circuit capable of quickly outputting a reset signal. <P>SOLUTION: Transistors MP5 and MP6 are connected in series between a first power line N1 and a node N6. The transistor MP5 senses a starting current Is and the transistor MP6 senses a reference current Ip. Even if a power supply voltage VDD is lowered, for both transistors MP5 and MP6, there is no possibility that voltages not less than a threshold voltage are applied among gates and sources, and a charging circuit 8 is hardly charged with a charging current Io. Accordingly, when the power supply voltage VDD is restored and the power supply voltage VDD is raised, a transistor MP4 can quickly supply the starting current Is to a node N5 and a current generating circuit 6 can quickly generate the reference current Ip. <P>COPYRIGHT: (C)2013,JPO&INPIT</p>
申请公布号 JP5842475(B2) 申请公布日期 2016.01.13
申请号 JP20110188969 申请日期 2011.08.31
申请人 株式会社デンソー 发明人 井上 昭光
分类号 G05F3/24;G05F3/26 主分类号 G05F3/24
代理机构 代理人
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