发明名称 CLOCK PHASE CONTROL APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To provide a clock phase control apparatus including a voltage control delay means which enables a control voltage/delay time property to be hardly affected by variation in all samples even if the property of a component such as a transistor is varied by a manufacturing error or the like for each sample. <P>SOLUTION: The present invention relates to a clock phase control apparatus including a multi-phase clock producing means to which a high frequency clock is inputted to produce a multi-phase clock. The multi-phase clock producing means includes a voltage control delay means, the voltage control delay means includes a voltage/current converting section 108 for converting an inputted control voltage to a current, and also includes: a control means for outputting a control current in proportion to the current converted by the voltage/current converting section 108; and a delay means for delaying the high frequency clock just for a time corresponding to the control current and outputting the delayed high frequency clock, and the voltage/current converting section 108 has a linear voltage/current conversion property in a predetermined input voltage range. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009005214(A) 申请公布日期 2009.01.08
申请号 JP20070165905 申请日期 2007.06.25
申请人 RICOH CO LTD 发明人 KOZASA MADOKA
分类号 H03K5/13;H03K5/00;H03K5/131;H03L7/081 主分类号 H03K5/13
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