发明名称 SEQUENCE DETECTION FOR FLASH MEMORY WITH INTER-CELL INTERFERENCE
摘要 A memory integrated circuit (IC) includes a read module and a sequence detector module. The read module reads S memory cells (cells) located along one of a bit line and a word line and generates S read signals, where S is an integer greater than 1. The sequence detector module detects a data sequence based on the S read signals and reference signals. The data sequence includes data stored in the S cells. Each of the reference signals includes an interference-free signal associated with one of the S cells and an interference signal associated with another of the S cells that is adjacent to the one of the S cells.
申请公布号 US2009059661(A1) 申请公布日期 2009.03.05
申请号 US20080191616 申请日期 2008.08.14
申请人 发明人 YANG XUESHI;WU ZINING
分类号 G11C16/06;G11C7/00 主分类号 G11C16/06
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