| 摘要 |
1,267,642. Control of D.C. motors. GENERAL ELECTRIC CO. 21 Jan., 1970 [28 Jan., 1969], No. 2891/70. Heading H2J. To control a servomotor 13 an input D.C. error signal is applied to terminal 37 and is mixed with a triangular reference voltage which is applied to terminal 36, the combined signal forming an input for level-sensing detectors 31, 32. The motor is supplied through bridgeconnected power transistors Q 1 -Q 4 which are associated with control transistors Q 1a -Q 4a . Due to the memory capability of NAND gates 61, 62, either one of the lower power transistors will remain conductive, for example the transistor Q 4 . Under these circumstances, the gates 61, 62, provide "1" and "0" outputs, respectively. When the output of both detectors 31, 32 is zero NAND gates 41, 42, provide "1" signals, whilst inverters 44, 49, provide "0" signals. Circulating current is passed from the motor through transistor Q 4 and diode D 2 . When the combined signal exceeds a negative threshold, the output of detector 32 goes to logic "1" at intervals dependent upon the strength of the error signal, whereby transistor Q 3 conducts and the motor is supplied through transistors Q 3 , Q 4 . During off-periods, coasting current is maintained through the elements Q 4 , D 2 . If the combined signal exceeds a positive threshold, transistors Q 1 , Q 2 become conductive so that the motor is reversed. The gates 41, 42 are interconnected to prevent simultaneous conduction of the power transistors Q 1 , Q 3 . A delay capacitor 68' prevents turn-on of the transistor Q 1 before transistor Q 4 turns off, thus ensuring that there are no transient bridge short-circuits. Zener diodes 64, 66, are effective when power is first switched-on to enable gates 61, 62, to establish their logic levels before transistors Q 2 , Q 4 are turned-on. |
