发明名称 |
Direct memory access controller with encryption and decryption for non-blocking high bandwidth I/O transactions |
摘要 |
Due to the integration of multiple I/O device controllers in a storage controller and the need to provide secure and fast data transfers between the I/O devices and the storage controller, an architecture that can perform multiple encrypt/decrypt operations simultaneously is therefore needed to service multiple transfer requests without a negative impact on the speed of transfer and processing. The present invention relates to enhancing Direct Memory Access (DMA) operations between multiple IO devices and a storage controller by adding a Data Processing Core. Exemplary implementations are provided to illustrate the background mechanism used by a DMA controller that minimizes central-processing-unit (CPU) intervention and the multi-channel architecture which allows multiple IO requests to be serviced simultaneously.
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申请公布号 |
US7716389(B1) |
申请公布日期 |
2010.05.11 |
申请号 |
US20060378762 |
申请日期 |
2006.03.17 |
申请人 |
BITMICRO NETWORKS, INC. |
发明人 |
BRUCE REY;DAVID RAQUEL BAUTISTA;ESTRADA SHIELOU VICENCIO |
分类号 |
G06F3/00;G06F13/00;H04L12/28 |
主分类号 |
G06F3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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