发明名称 Efficient hardware divide operation
摘要 One embodiment of the present invention provides a system that uses the Newton-Raphson technique to perform a division operation. During operation, the system receives a numerator a and a denominator b. The system then divides a by b by first using the Newton-Raphson technique to calculate 1/b, and then multiplying 1/b by a to produce the result a/b. While using Newton-Raphson technique to find 1/b, the system first obtains an initial estimate x0 for 1/b and then iteratively solves the equation xi+1=xi(2-bxi). Each iteration involves: (1) using a multiplier circuit to multiply b by xi to compute bxi; (2) performing a bit-wise complement operation on bxi to compute 2-bxi, whereby an additional pass through an adder circuit or a multiply/add circuit is not required to perform the subtraction operation. (3) The system then uses the multiplier circuit to multiply xi by 2-bxi to compute xi(2-bxi).
申请公布号 US7599982(B1) 申请公布日期 2009.10.06
申请号 US20050223837 申请日期 2005.09.08
申请人 SUN MICROSYSTEMS, INC. 发明人 RARICK LEONARD D.
分类号 G06F7/52 主分类号 G06F7/52
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