发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND DEPLETION-TYPE MOS TRANSISTOR
摘要 A peripheral circuit includes at least a first transistor. The first transistor comprises a gate electrode formed on a surface of a semiconductor layer via a gate insulating film. A channel region of a first conductivity type having a first impurity concentration is formed on a surface of the semiconductor layer directly below and in the vicinity of the gate electrode. A source-drain diffusion region of the first conductivity type is formed on the surface of the semiconductor layer to sandwich the gate electrode and has a second impurity concentration greater than the first impurity concentration. An overlapping region of the first conductivity type is formed on the surface of the semiconductor layer directly below the gate electrode where the channel region and the source-drain diffusion region overlap. The overlapping region has a third impurity concentration greater than the second impurity concentration.
申请公布号 US2009218637(A1) 申请公布日期 2009.09.03
申请号 US20090359643 申请日期 2009.01.26
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 GOMIKAWA KENJI;NOGUCHI MITSUHIRO
分类号 H01L29/78 主分类号 H01L29/78
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