发明名称 Locating hold time violations in scan chains by generating patterns on ATE
摘要 A method for determining that failures in semiconductor test are due to a defect potentially causing a hold time violation in a scan cell in a scan chain, counting the number of potential defects, and, if possible, localizing, and ameliorating hold time defects in a scan chain.
申请公布号 US7853846(B2) 申请公布日期 2010.12.14
申请号 US20070931847 申请日期 2007.10.31
申请人 VERIGY (SINGAPORE) PTE. LTD. 发明人 CANNON STEPHEN A.;DOKKEN RICHARD C.;CROUCH ALFRED L.;WINBLAD GARY A.
分类号 G01R31/28 主分类号 G01R31/28
代理机构 代理人
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