发明名称 INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To solve the problems wherein a successive approximation register A/D converter is influenced by interference from other circuits via a power line, and an approximation action of the successive approximation register AD converter is delayed.SOLUTION: A successive approximation register A/D converter 200 for producing an N-bit output is operationally interrupted at timings of operational influence on the successive approximation register A/D converter 200 on the basis of timings of operation of each circuit of an integrated circuit 1. The successive approximation register A/D converter 200 compares a sampling signal with comparative reference voltages in a sampling period of sampling an analog signal, an N-state approximation period of successively comparing the sampled signal bit by bit with the comparative voltages, and an M-state reserve period following the approximation period. In the event of an operational interruption, the successive approximation register A/D converter 200 executes in the reserve period the comparison action of the bit that has not been compared in the approximation period.
申请公布号 JP2013191976(A) 申请公布日期 2013.09.26
申请号 JP20120055835 申请日期 2012.03.13
申请人 RENESAS ELECTRONICS CORP 发明人 MATSUMOTO YOJI;ITO MASAO;MATSUMOTO OSAMU;SUZUKI HIROTO
分类号 H03M1/08;H03M1/46 主分类号 H03M1/08
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