发明名称 Random-access memory with dynamically adjustable endurance and retention
摘要 A memory device is provided. The memory device comprises an array of memory cells, each including a volume of material that can stably exhibit at least two different physical states that are each associated with a different data value, word lines that each interconnects a row of memory cells within the array of memory cells to a word-line driver, and bit lines that each interconnects a column of memory cells, through a bit-line driver, to a write driver that is controlled, during a WRITE operation, to write an input data value to an activated memory cell at the intersection of the column of memory cells and an activated row of memory cells by generating a current density within the memory cells that corresponds to retention/endurance characteristics of the memory cell dynamically assigned to the memory cell by a memory controller, operating system, or other control functionality.
申请公布号 US8638600(B2) 申请公布日期 2014.01.28
申请号 US201113092789 申请日期 2011.04.22
申请人 MURALIMANOHAR NAVEEN;CHANG JICHUAN;RANGANATHAN PARTHASARATHY;HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 MURALIMANOHAR NAVEEN;CHANG JICHUAN;RANGANATHAN PARTHASARATHY
分类号 G11C7/00 主分类号 G11C7/00
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