Multi-mode I/O circuitry supporting low interference signaling schemes for high speed digital interfaces

摘要

A multi-mode I/O circuit or cell (10) is provided for transmitting and receiving data between ICs, where each IC contains at least one of the I/O circuits. Each data link includes transmitter circuitry (12) and receiver circuitry (14). The transmitter circuitry sends data to a receiver circuitry in another IC, and the receiver circuitry receives data from a transmitter circuitry in another IC. The I/O circuit is constructed with CMOS-based transistors (e.g., CMOS or BiCMOS) that are selectively interconnected together by a plurality of switches to operate as two single-ended, current or voltage mode links, or as a single differential current or voltage mode link. In the preferred embodiment the transmitter circuitry sends data to the receiver circuitry in another IC over a first pair of adjacently disposed conductors, and the receiver circuitry receives data from the transmitter circuitry in another IC over a second pair of adjacently disposed conductors. The transmitter circuitry and the receiver circuitry are selectively configured by the plurality of switches for operating in a double single-ended voltage mode link mode, a double single-ended current mode link mode, a mode defined by a single differential voltage mode link with a single-ended input drive, a mode defined by a single differential voltage mode link with a differential input drive, a mode defined by a single differential current mode link with a single-ended input drive mode, and a mode defined by a single differential current mode link with a differential input drive. A common I/O circuit may also be provided, and programmed into either the transmitter or the receiver circuit configuration.

主权项

1. A method, comprising:
providing a first integrated circuit with at least one instance of an input/output circuit constructed with metal oxide semiconductor transistors; programming said input/output circuit in the first integrated circuit to function as one of data transmitter circuitry or data receiver circuitry, where said programming comprises metal oxide semiconductor transistors of the input/output circuit in said first integrated circuit are selectively interconnected together by a plurality of switches to operate in a first mode as two single-ended current or voltage mode links, and in a second mode as a single differential current or voltage mode link, where at least one of the two single-ended voltage mode links and said single differential voltage mode link is a low swing voltage mode link, wherein during operation of said first integrated circuit, said input/output circuit in said first integrated circuit is reprogrammed to alternatively function as data transmitter circuitry and data receiver circuitry to support a bidirectional link; and based upon the programming, performing one of sending data to, or receiving data from, a second integrated circuit using the at least one instance of the input/output circuit, wherein said single differential current or voltage mode link is capable of functioning, alternatively as a transmitter for sending data to the second integrated circuit and as a receiver for receiving data from the second integrated circuit.