| 摘要 |
The present invention relates to a resistive random access memory (RRAM) device architecture, that includes a thin single layer of a conductive etch-stop layer between a lower metal interconnect and a lower electrode of an RRAM cell. The conductive etch-stop layer provides simplicity in structure, and the etch-selectivity of the layer provides protection to underlying layers. The conductive etch stop layer can be etched by using a dry or wet etch to land on the lower metal interconnect. In the case that the lower metal interconnect is copper, etching the conductive etch stop layer to expose the copper does not produce as much non-volatile copper etching by-products as in traditional methods. Compared to the traditional methods, some embodiments of the disclosed techniques reduce the number of mask step and also reduce chemical mechanical polishing during the formation of a lower electrode. |
