发明名称 DATA PROCESSING APPARATUS, PROCESSOR AND ITS CONTROL METHOD
摘要 <p>PROBLEM TO BE SOLVED: To attain speedup and increase in efficiency to transfer a bit plane or bit data especially of multi-valued data. SOLUTION: In a data processing apparatus, multi-valued data of 8 bits is stored into a memory 50 by 4 pieces per one word, then multi-valued data of 4 by 4=16 pieces is taken on a single processing unit (a processing block) of a bit plane coding. At memory area 51, the most significant bit (bit 7) of each multi-valued data (in Fig. 5, data 0 - data 15) is gathered in order of each multi-valued data to be stored at one place as shown by a batched part. A bit 6 is also stored in the same way.</p>
申请公布号 JP2002204356(A) 申请公布日期 2002.07.19
申请号 JP20010297445 申请日期 2001.09.27
申请人 CANON INC 发明人 OOSA KINYA
分类号 H04N19/60;G06F13/28;G06T1/60;G06T9/00;H03M7/40;H04N1/41;H04N19/34;H04N19/423;H04N19/635;H04N19/91;(IPC1-7):H04N1/41;H04N7/30 主分类号 H04N19/60
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