| 发明名称 |
SYSTEM AND METHOD FOR ELECTRICAL TESTING OF THROUGH SILICON VIAS (TSVs) |
| 摘要 |
A testing system for carrying out electrical testing of at least one first through via forms an insulated via structure extending only part way through a substrate of a first body of semiconductor material. The testing system has a first electrical test circuit integrated in the first body and electrically coupled to the insulated via structure. The first electrical test circuit enables detection of at least one electrical parameter of the insulated via structure. |
| 申请公布号 |
US2015355267(A1) |
申请公布日期 |
2015.12.10 |
| 申请号 |
US201514827796 |
申请日期 |
2015.08.17 |
| 申请人 |
STMicroelectronics S.r.l. |
发明人 |
Pagani Alberto |
| 分类号 |
G01R31/27;H01L23/48;G01R31/28;H01L21/66 |
主分类号 |
G01R31/27 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus, comprising:
a first semiconductor substrate layer of a first conductivity type having a first top surface and a first bottom surface; a first tubular column of insulating material in said first semiconductor substrate layer extending from the first top surface to a depth that does not reach the first bottom surface; and a first metal material disposed within the first tubular column of insulating material, said first metal material having a bottom surface in contact with the first semiconductor substrate layer. |
| 地址 |
Agrate Brianza IT |
