MEMORY DEVICE POWER MANAGERS AND METHODS

摘要

Memory devices and methods are described that include a stack of memory dies and an attached logic die. Method and devices described provide for power management of portions of a stack of memory dies. Additional devices, systems, and methods are disclosed.

主权项

1. A memory device, comprising:
a stack of memory arrays; an activity tracker located in a die stacked with the stack of memory arrays to monitor different levels of activity of at least one of a plurality of portions of the stack of memory arrays, wherein the portions include a plurality of vertical memory vaults; a plurality of serialized communication link interfaces to couple the plurality of vertical memory vaults to a host processor; and a matrix switch enabling cross-connecting each of the plurality of serialized communication link interfaces to a selected vertical memory vault.