Security enclave processor boot control

摘要

An SOC implements a security enclave processor (SEP). The SEP may include a processor and one or more security peripherals. The SEP may be isolated from the rest of the SOC (e.g. one or more central processing units (CPUs) in the SOC, or application processors (APs) in the SOC). Access to the SEP may be strictly controlled by hardware. For example, a mechanism in which the CPUs/APs can only access a mailbox location in the SEP is described. The CPU/AP may write a message to the mailbox, which the SEP may read and respond to. The SEP may include one or more of the following in some embodiments: secure key management using wrapping keys, SEP control of boot and/or power management, and separate trust zones in memory.

主权项

1. A system comprising:
a central processing unit (CPU) complex including at least one first processor; and a security circuit coupled to the CPU complex and configured to provide one or more secure services in the system, wherein the security circuit includes at least one second processor and a boot read-only memory (ROM) coupled to the at least one second processor, and wherein the boot ROM is inaccessible to circuitry outside the security circuit within the system, and wherein the at least one second processor is configured to boot directly from the boot ROM, and wherein the code from the boot ROM is not stored in software-accessible memory, and wherein the at least one second processor, in response to executing the code, is configured to authenticate the code.