SEMICONDCUTOR MEMORY DEVICE PERFORMING SELF REPAIR OPERATION

摘要

According to an embodiment of the present invention, a semiconductor memory device includes: a memory cell array including a main cell array and a repair cell array; a command control unit which controls input and output operation of the memory cell array according to a request for reading or writing; an address generation unit which stores the repair address and generates an internal address according to a read-requested or writing-requested external address and the repair address; an ECC block which performs parity calculation with respect to data input and output of the memory cell array; an address table which associates an address of failure with the number of failure occurrence and store the address of failure and the number of failure occurrence if the failure occurs in the ECC block; and a repair control unit which controls the address generation unit to select a repair address based on the number of the failure occurrence stored in the address table and to store information of the selected repair address.