发明名称 |
Addressing variations in bit error rates amongst data storage segments |
摘要 |
The disclosure is related to an apparatus and methods for addressing variations in bit error rates amongst data storage segments. In a particular embodiment, an apparatus includes a controller that detects variations in bit error rates amongst different segments of a plurality of segments in a storage medium. The controller also adjusts a read/write operation parameter according to the detected variations amongst the bit error rates in the plurality of segments. |
申请公布号 |
US9195533(B1) |
申请公布日期 |
2015.11.24 |
申请号 |
US201314039012 |
申请日期 |
2013.09.27 |
申请人 |
Seagate Technology LLC |
发明人 |
Yang Won Choul;Kim Shi Jung;Lee Ju Yong;Camalig Clifford Jayson Bringas;Chai Mui Chong |
分类号 |
G11C29/00;G06F11/07 |
主分类号 |
G11C29/00 |
代理机构 |
Westman, Champlin & Koehler, P.A. |
代理人 |
Westman, Champlin & Koehler, P.A. |
主权项 |
1. An apparatus comprising:
a controller device configured to:
determine a topographical profile of a storage medium and a bit error rate profile of the storage medium;utilize a correlation function to determine whether the topographical profile and the bit error rate profile correspond prior to adjusting a read/write operation parameter to substantially avoid potential improper read/write operation parameter adjustments when bit error rate variations occur without corresponding topographical variations;detect at least one of the topographical variations or the bit error rate variations amongst different segments of a plurality of segments in the storage medium when the topographical profile and the bit error rate profile correspond; andadjust the read/write operation parameter according to the detected topographical variations or bit error rate variations to control bit error rates of the plurality of segments. |
地址 |
Cupertino CA US |