发明名称 INPUT BUFFER AND MEMORY DEVICE INCLUDING THE SAME
摘要 An input buffer includes a first buffer part, a feedback part, and a second buffer part. The first buffer part outputs an amplification signal to an output node based on an input signal. The feedback part controls the amplification signal by using a feedback circuit connected to the output node. The second buffer part provides a buffer output signal by buffering the amplification signal from the output node. The voltage of a first inverter node is not reduced by the feedback circuit included in the feedback part, and the input buffer can be operated at high speed.
申请公布号 KR20150129424(A) 申请公布日期 2015.11.20
申请号 KR20140056366 申请日期 2014.05.12
申请人 삼성전자주식회사 发明人 심용;배승준;윤원주
分类号 G11C7/10 主分类号 G11C7/10
代理机构 代理人
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