METHODS AND DEVICES FOR SILICON INTEGRATED VERTICALLY ALIGNED FIELD EFFECT TRANSISTORS

摘要

Embodiments of the present disclosure provide for vertically aligned CNTFET, methods of making vertically aligned CNTFET, methods of using vertically aligned CNTFET, and the like.

主权项

1. An apparatus comprising:
a stack including:
a source layer comprising silicon,a drain layer comprising a metal contact, anda dielectric layer disposed in between the source layer and the drain layer; wherein the source layer, the dielectric layer, and the drain layer are stacked in a vertical alignment; a single-walled carbon nanotube adjacent to a sidewall of the stack, at least a portion of the single-walled carbon nanotube coupled to the source layer and at least another portion of the single-walled carbon nanotube coupled to the drain layer; a gate dielectric adjacent to the single-walled carbon nanotube; and a gate electrode adjacent to the gate dielectric; wherein apparatus has a transfer characteristic depending at least in part upon a polarity of a drain to source voltage and a silicon doping type of the source layer.