| 发明名称 |
REDUNDANT INFORMATION COMPRESSION METHOD, AND SEMICONDUCTOR DEVICE |
| 摘要 |
A redundancy information compression method is configured to compress redundancy information among a plurality of macros for which redundancy processing is performed. The redundancy information compression method includes setting faulty bit position information, included in the redundancy information, for a macro of the plurality of macros including a faulty bit, the faulty bit position information indicating a position of the faulty bit included in the macro; and organizing macro numbers, included in the redundancy information, of macros of the plurality of macros having the same faulty bit position information as the set faulty bit position information together. |
| 申请公布号 |
US2015333777(A1) |
申请公布日期 |
2015.11.19 |
| 申请号 |
US201514701126 |
申请日期 |
2015.04.30 |
| 申请人 |
SOCIONEXT INC. |
发明人 |
AKIYOSHI Hideo |
| 分类号 |
H03M13/00;G06F11/10 |
主分类号 |
H03M13/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A redundancy information compression method configured to compress redundancy information among a plurality of macros for which redundancy processing is performed, comprising:
setting faulty bit position information, included in the redundancy information, for a macro of the plurality of macros including a faulty bit, the faulty bit position information indicating a position of the faulty bit included in the macro; and organizing macro numbers, included in the redundancy information, of macros of the plurality of macros having the same faulty bit position information as the set faulty bit position information together. |
| 地址 |
Yokohama-shi JP |
