发明名称 AMPLIFICATION CIRCUIT ADJUSTING DUTY CYCLE OF OUTPUT SIGNAL
摘要 An amplifying circuit comprises: an input unit, a first load unit, a second load unit, and a duty cycle adjusting unit. The input unit changes a voltage level of an output node in response to an input signal. One end of the first load unit is connected to the output node, and the other end of the first load unit is connected to the second load unit. The duty cycle adjusting unit provides compensated current by being connected between the first and the second load units.
申请公布号 KR20150128106(A) 申请公布日期 2015.11.18
申请号 KR20140054926 申请日期 2014.05.08
申请人 SK HYNIX INC. 发明人 YANG, JAE MO
分类号 H03K19/0185 主分类号 H03K19/0185
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