发明名称 半導体記憶装置
摘要 <p>According to one embodiment, a memory cell, a word line, and a peripheral circuit are provided. In the memory cell, a ferroelectric film is provided for a gate insulating film. The word line is connected to a control gate electrode of the memory cell. In the peripheral circuit, ferroelectric films are provided for gate insulating films and the peripheral circuit is provided near the memory cell. Here, between the same conductive type transistors of the peripheral circuit, a channel impurity concentration of a transistor to which a driving voltage which drives the word line is applied is different from a channel impurity concentration of a transistor to which a voltage which is lower than the driving voltage is applied.</p>
申请公布号 JP5818833(B2) 申请公布日期 2015.11.18
申请号 JP20130046617 申请日期 2013.03.08
申请人 发明人
分类号 H01L21/8246;H01L27/10;H01L27/105 主分类号 H01L21/8246
代理机构 代理人
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