| 摘要 |
The present invention relates to a counter, an analog to digital converter including the counter, and an image sensing device including the analog to digital converter. The counter of the present invention comprises: a sampling unit for sampling a logic state of a least significant bit (LSB) during a counting hold section included between ramp sections; a toggling control unit for generating the LSB which toggles corresponding to a voltage level of a counting target signal by every ramp section in response to the clock and a sampling signal outputted from the sampling unit, and for generating the LSB which toggles during a first period of the ramp section with respect to the voltage level of the counting target signal or generating the LSB which toggles during a last period of the ramp section with respect to the voltage level of the counting target signal by every ramp section; and a control logic unit for controlling the toggling control unit to alternately select any one of the first and last periods by every ramp section. |
