发明名称 |
Adaptive equalizer |
摘要 |
An adaptive equalizer (100) has a signal converter (200) for performing a fast Fourier transform and/or an inverse fast Fourier transform. The signal converter (200) has: a first wide-bit memory (201) capable of reading/writing a plurality of sample signals; a first register group (202) comprising a plurality of registers capable of accessing the first wide-bit memory (201); a butterfly computation unit group (204) comprising a plurality of butterfly computation units; and a first connection switching unit (203) for switching the state of connection between the plurality of registers and the plurality of butterfly computation units. |
申请公布号 |
US9191253(B2) |
申请公布日期 |
2015.11.17 |
申请号 |
US201214239923 |
申请日期 |
2012.06.29 |
申请人 |
PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD. |
发明人 |
Yomo Hidekuni;Matsuoka Akihiko;Maruyama Atsushi |
分类号 |
H03H7/30;H04L27/01;G06F17/14;H04L25/03 |
主分类号 |
H03H7/30 |
代理机构 |
Pearne & Gordon LLP |
代理人 |
Pearne & Gordon LLP |
主权项 |
1. An adaptive equalizer that performs adaptive equalization on a time-domain signal in a frequency domain, comprising a signal conversion section that performs at least one of a fast Fourier transform and an inverse fast Fourier transform, wherein the signal conversion section includes:
a memory capable of reading and writing signals for 2M samples, where M is a natural number; 2M registers accessible to the memory; M butterfly operation sections; and a switching control section that switches a connection state between the 2M registers and the M butterfly operation sections, wherein: the signal conversion section includes two pairs of the memory and the 2M registers; and the switching control section switches a connection state (i) between the 2M registers in one of the two pairs and the M butterfly operation sections and (ii) between the 2M registers in the other of the two pairs and the M butterfly operation sections, such that a role of the memory is switched between a memory for output and a memory for input for each stage of the fast Fourier transform and the inverse fast Fourier transform. |
地址 |
Osaka JP |