| 摘要 |
PROBLEM TO BE SOLVED: To provide a line latch circuit that does not need a change of circuit configuration or layout according to the latch size of serially-latched data and does not require a large circuit such as an address decoder to respond to different latch sizes.SOLUTION: The line latch circuit includes a shift register circuit with a plurality of shift latches serially shifting a latch clock in synchronization with a clock signal, and a latch circuit latch-enabling a latch clock. A timing control circuit outputs a latch clock to a shift latch at the first stage when the measured value of clock signals in every cycle of input data supply to the line latch circuit reaches a first target value, and outputs a latch clock to a shift latch at the predetermined middle stage when the measured value reaches a second target value. |
