| 主权项 |
1. A quantum processor comprising:
a plurality of unit cells tiled over an area such that each unit cell is positioned adjacent at least one other unit cell, each unit cell comprising:
a first set of qubits and a second set of qubits, each of the qubits of the first and the second sets of qubits having a respective major axis, the major axes of the qubits of the first set parallel with one another along at least a majority of a length thereof, and the major axes of the qubits of the second set parallel with one another along at least a majority of a length thereof, the major axes of the qubits of the second set of qubits nonparallel with the major axes of the qubits of the first set of qubits, and each qubit in the first set of qubits crosses at least one qubit in the second set of qubits and at least one qubit in the first set of qubits crosses at least one other qubit in the first set of qubits, and for each unit cell none of the qubits of the respective unit cell cross any of the respective qubits of any other one of the unit cells;a first set of intra-cell coupling devices, wherein each coupling device in the first set of intra-cell coupling devices is positioned proximate a respective point where a respective one of qubits in the first set of qubits crosses one of the qubits in the second set of qubits and provides controllable communicative coupling between the qubit in the first set of qubits and the respective qubit in the second set of qubits; anda second set of intra-cell coupling devices, wherein each coupling device in the second set of intra-cell coupling devices is positioned proximate a respective point at which each at least one qubit in the first set of qubits crosses the at least one other qubit in the first set of qubits and provides controllable communicative coupling between the at least one qubit in the first set of qubits and the at least one other qubit in the first set of qubits. |
