Electrostatic protection for stacked multi-chip integrated circuits

摘要

One feature pertains to a multi-chip module that comprises at least a first integrated circuit (IC) die and a second IC die. The second IC die has an input/output (I/O) node electrically coupled to the first IC die by a through substrate via. The second die's active surface also includes a fuse that is electrically coupled to the I/O node and adapted to protect the second IC die from damage caused by an electrostatic discharge (ESD). In particular, the fuse protects the second IC die from ESD that may be generated as a result of electrically coupling the first die to the second die during the manufacturing of the multi-chip module. Upon coupling the first die to the second die, the fuse may bypass the ESD current generated by the ESD to ground. After packaging of the multi-chip module is complete, the fuse may be blown open.

主权项

1. A multi-chip module, comprising:
a first integrated circuit (IC) die; a second IC die, in a stacked arrangement relative to the first IC die, having an input/output (I/O) node configured to electrically couple to the first IC die by a through substrate via (TSV) in the second IC die; and a fuse on an active surface of the second IC die that is configured to electrically couple to the I/O node, wherein the fuse is configured to allow an electrostatic discharge (ESD) current surge to go directly to ground and bypass an amplifier circuit of the second die to protect the amplifier circuit from damage caused by the ESD current surge, and the amplifier circuit is configured to generate a fuse-blow current to transition the fuse from a closed state to an open state to electrically disconnect the I/O node from ground and provide output signals and/or receive input signals at the I/O node.