Modifying a Virtual Processor Model for Hardware/Software Simulation

摘要

A method or apparatus for transforming a provided virtual processor model to a user virtual processor model. The method in on embodiment comprises transforming a virtual processor model to simulate a user target processor, by receiving a transformable virtual processor model having a transformable instruction set and a transformable pipeline, and transforming the transformable virtual processor model to a user virtual processor model designed to simulate a user target processor.

主权项

1. A method to transform a virtual processor model to simulate a user target processor, the method comprising:
receiving a transformable virtual processor model having a transformable instruction set and a transformable pipeline; transforming the transformable virtual processor model to a user virtual processor model designed to simulate a user target processor, the transforming comprising one or more of:
adding a new instruction;modifying a definition of one or more instructions; andmodifying a processor structure by one or more of:
adding an additional pipeline associated with the user virtual processor model to the transformable virtual processor model; andmodifying the transformable pipeline of the transformable virtual processor model according to the user virtual processor model;wherein at least one of the receiving, and transforming is performed by a processor.