| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a PLL circuit in which accurate frequency control of an output clock signal can be performed easily. <P>SOLUTION: A PLL circuit comprises a charge pump which is configured to output an outflow or inflow output current and in which ON/OFF of the output current is switched according to a pulse signal, and a pulse signal generator which generates the pulse signal according to a multi-value reference signal having cyclicity. The PLL circuit is configured to generate an output clock signal according to the output current. The PLL circuit further comprises a current amount adjusting section which adjusts the amount of the output current according to the reference signal. <P>COPYRIGHT: (C)2013,JPO&INPIT</p> |
