发明名称 Thread assignment for power and performance efficiency using multiple power states
摘要 A method is performed in a computing system that includes a plurality of processing nodes of multiple types configurable to run in multiple performance states. In the method, an application executes on a thread assigned to a first processing node. Power and performance of the application on the first processing node is estimated. Power and performance of the application in multiple performance states on other processing nodes of the plurality of processing nodes besides the first processing node is also estimated. It is determined that the estimated power and performance of the application on a second processing node in a respective performance state of the multiple performance states is preferable to the power and performance of the application on the first processing node. The thread is reassigned to the second processing node, with the second processing node in the respective performance state.
申请公布号 US9170854(B2) 申请公布日期 2015.10.27
申请号 US201313909789 申请日期 2013.06.04
申请人 ADVANCED MICRO DEVICES, INC. 发明人 Breternitz Mauricio;Piga Leonardo
分类号 G06F9/50;G06F9/48;G06F1/32 主分类号 G06F9/50
代理机构 Park, Vaughan, Fleming & Dowler LLP 代理人 Park, Vaughan, Fleming & Dowler LLP
主权项 1. A method of computing, comprising: in a computing system comprising a plurality of processing nodes of multiple types, each processing node configurable to operate in multiple performance states, the plurality of processing nodes comprising a first processing node and a second processing node: executing an application on a thread assigned to the first processing node;estimating power and performance of the application on the first processing node;estimating power and performance of the application in multiple performance states on other processing nodes of the plurality of processing nodes besides the first processing node, the other processing nodes including the second processing node;determining that the estimated power and performance of the application on the second processing node operating in a respective performance state of the multiple performance states is preferable to the power and performance of the application on the first processing node; andreassigning the thread to the second processing node, with the second processing node operating in the respective performance state.
地址 Sunnyvale CA US
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